A Smartphone’s Brain
In the last post, we did a brief introduction talking data, instructions sets and just a general introduction. Now we’ll go a bit deeper. Please note that this is just to give you a general basic understanding of how these things work. Straight to the point basic knowledge.
Now let’s look at the CPU itself. Inside a CPU you’ll find
1. Control unit
2. Arithmetic and Logic unit
3. Registers (Immediate access store and cache)
These are the three main parts of a CPU inside an SoC.
Opcode and Operand: An opcode is an instruction attached to any piece of data sent to the CPU for processing. An Operand is the data that has been sent to the CPU for processing. If you click on a photo (data or operand) on your phone and click delete (opcode or instruction), both the instruction and the data are sent to your CPU for processing.
The control unit does not carry out processing. It’s function is to tell the other parts of the CPU how to do their jobs. It does this by recognising the opcode attached to an operand, matching it with the same code in the instruction set and then feeding it to the ALU which then can carries out this task.
The ALU consists of two parts, the Arithmetic unit (AU) and the Logic unit (LU). The arithmetic unit carries out arithmetic like add, subtract, divide or multiply while the logic unit carries out logical tasks like comparison, interpretation or true or false tasks. The ALU carries out its functions through the use of logic gates.
Registers and Cache: These are very fast memory circuits. You can think of each register as a box which holds a piece of data useful to the CPU. These pieces of data allow the CPU to quickly ‘fetch’ and then ‘decode’ and then ‘execute’ the instuctions held in RAM that are part of a program, one instruction at a time.
It is important to note that RAM is not part of the CPU, it is part of a Smartphone’s SoC but not part of the CPU.
When you give an instruction to your phone, the Opcode and Operand are sent to the control unit. The app (e.g keyboard) which you are using is already kept in the RAM, also a copy of the instruction set is kept in the RAM. So when the Opcode and Operand reaches the control unit, the control unit then establishes two lines of communication with the RAM (1 for Opcode data and 2 for Operand address). The CPU does not have any proper storage of its own so it has to keep data in the RAM. This first stage is the fetch stage.
When the CPU has sent data to the RAM, it begins the decode and execute phase. Taking in bits of the operand to be worked on and matching it with the Opcode, when it’s matched. If the task to be done has the Opcode appearing multiple times, the control unit will save that piece of data to it’s internal cache which is usually very small so that it doesn’t have to go to the RAM till that particular set of tasks is done. The control unit feeds the data with the instructions to the ALU where the processing is done. The ALU is a maze of transistors arranged in patterns called logic gates. When data passes through them, they are processed and the results are given out as an output.
In the old days, each processor only had one CPU which did all the load, but now you can have more than one CPU sharing the load. Thus making processing of data easier and faster. Each CPU is called a core. When you have 2 CPU (dual core), 4 CPU (quad core), 6 CPU (Hexa core), 8 CPU (Octacore) and 10 CPU (Deca core).
The time taken to carry out the fetch-decode-execute cycle is called a clock cycle and it is measured per second. The unit of measurement is in Hertz. These days, CPUs run at gigahertz per second.
We’ll still look at logic gates and try to determine if clock speed is what makes a CPU great as some people here have argued.
Some photos to illustrate
1. Data and address buses between CPU and RAM on a motherboard (the green lines)
2. Decode phase
3. Opcode and Operand